Processor interface to transceiver PHY

[SDavi9]

I have been looking into the design process for implementing a (Optical) transceiver interface in within a Intel FPGAs. How / where does the processor (e.g. Nios) that is to be responsible for the transfer of the applicable data meant to interface to the PHY ? Where can I find information about this interface ? 

[aikeu]

Hi SDavi9,

I think the link below may help related to Nios Ethernet standard design example:

https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-examples/horizontal/exm-net-std-de.html

Thanks.

Regards,

Aik Eu

[aikeu]

Hi SDavi9,

I will close the thread if no further question.

Thanks.

Regards,

Aik Eu

[SDavi9]

Dear Aik Eu,

We have a number of designs implemented with a NIOS II processor and TSE. What we need is an actual design example that implements an interface to the Cyclone 10 Gx development board transceivers via the FMC connectors AND that can be used with a NIOS processor to send and receive data ?

Best regards

Shmuel 

[aikeu]

Hi SDavi9,

I will try to consult the team and get back to you with your latest feedback.

Thanks.

Regards,

Aik Eu

[aikeu]

Hi SDavi9,

I have consulted the team and there are only some reference available for fmc loopback as below but not specific to your request:

https://www.intel.com/content/dam/support/us/en/programmable/support-resources/fpga-wiki/asset03/cyclone-10-gx-xcvr-toolkit-reference-design-user-guide.pdf

https://www.eeweb.com/wp-content/uploads/articles-app-notes-files-implementing-intel-cyclone-10-gx-triple-rate-sdi-ii-with-nextera-fmc-daughter-card.pdf

Thanks.

Regards,

Aik Eu

[SDavi9]

Dear Aik Eu,

Thank you for your response ! 

The first reference I have already seen - however this seems to be only a loop back and doesn't give me any details how I would connect and use a NIOS processor with it ? I need to know how to transfer data from the NIOS out of the FPGA via the optical interface ???

The 2nd design also appears to be a loop back design and I don't see where the NIOS would be connected. Also it appears to be a SDI design and not a Optical interface ? 

Best regards

Shmuel 

[aikeu]

Hi SDavi9,

I will close the thread if no further questions.

Thanks.

Regards,

Aik Eu

[aikeu]

Hi SDavi9,

As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

Thanks.

Regards,

Aik Eu