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System memory content editor

Altera_Forum
Honored Contributor II
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I have a design in a Cyclone II with a dual port memory created using the megawizard plug in manager (RAM: 2-PORT). For debugging it would be useful to see the contents of the memory. 

 

Is this possible using the In-System Memory Content Editor? 

 

The help for the RAM: 2-PORT (altsyncram Megafunction) says that I must 

 

"turn on the Allow In-System Memory Content Editor to capture and update content independently of the system clock option (that is, the ENABLE_RUNTIME_MOD and INSTANCE_NAME parameters must be enabled) when instantiating the altsyncram megafunction with the MegaWizard Plug-In Manager. " 

 

However I can't see where this is done. 

 

 

Any help greatly appreciated. 

Ian
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Altera_Forum
Honored Contributor II
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In order for the memory content editor to work, it needs to read and write to the memory. This means it needs an address port and data in and data out ports. So you can only use this option with single-port RAMs, which I understand can be limiting. If you're dual-port RAM is run off the same clock(or related clocks), you might be able to change it to use one port and time multiplex your address and data(basically running twice as fast and muxing all the control, address and data). If you have extra memory available, putting signaltap into the design is usually easier, since you don't have this limitation(you're just pumping the data into another memory).

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Altera_Forum
Honored Contributor II
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Thanks for the info. I'll add a signal tap as the 2 port memory is across different clock domains. 

 

Cheers 

Ian.
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Altera_Forum
Honored Contributor II
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Note that you could also create two single port rams that are written to concurrently with your dp ram. Since the memory content editor can access these, you can do the same thing. The nice thing is your output will look more like memory contents, where signaltap will show it in a waveform format(unless there's a simple trick I don't know about). For example, if you're memory is 4K deep and your signaltap is, say 8K deep, it is unlikely that you'll capture at a time when all 4K locations have been written to over 8K cycles, so you won't actually see everything in there. Shadowing your ram with single-port in-system content memory editors will resolve that. 

 

As you see, there can be a decent amount of engineering that goes into debugging, although it's almost always worth the investment. (One other thing I can think of is that the shadow single-port RAMs wouldn't actually feed anything, so they might get synthesized out. I doubt this will happen since turning on the In-System Content Editor adds logic to these memories that takes their output to the JTAG circuitry, but will leave that experiment up to the user....)
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Altera_Forum
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Thanks again Rysc. I like the idea of adding a single port ram for debug purposes. As you say, it will look more like memory contents which will be easier (in this application) than looking at waveforms. 

 

Cheers 

Ian.
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Altera_Forum
Honored Contributor II
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hi  

i am using lpm_ram_dp 

but i con not find an option called: " turn on the allow in-system memory content editor to capture and update content independently of the system clock option" 

where is it? !  

thanks in advance.
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Altera_Forum
Honored Contributor II
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i want to check a memory, i checked the read port in this way that i write something in an mif file and read it with memory and it was ok  

but now that im trying to check the write port: i write in the memory but i can not check whether it worked or not, i check the mif file but there is no change in it after simulation !  

how should i check?  

thanks
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