Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

ISP for MaxII

Altera_Forum
Honored Contributor II
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Hi All,  

 

 

I have a MaxII in my design working in conjunction with a standard 16bit micro. I can update the micro firmware in the field over a comms link and would like to be able to reconfigure the CPLD at the same time. I envisage downloading the CPLD config file to the micro, and then using that to configure the CPLD via I/O on the micro connected to the MaxII JTAG port. 

 

Unfortunately, the Altera recommended Jam player is not an option since I've got very tight memory requirements (<10K ram, flash space is not a problem). Does anyone have any experience of trying any other methods? Is JRunner an option? It looks from the description like it may be, but I can't find any reference to it being used with a MaxII.  

 

Thanks in advance, 

 

Jim
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Altera_Forum
Honored Contributor II
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I would suggest you file an SR on the Altera Support page for this one.

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Altera_Forum
Honored Contributor II
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Hi everyone,  

 

For anyone who is interested in this we've finally got a solution. We're using the .svf file format that can be generated from QuartusII. The .svf describes the programming procedure at a very low level in terms of JTAG states and data transfer. 

 

The .svf file generated is quite large (it is an ASCII file). We've written an interpreter that converts it into a proprietary binary format and then stream that down to our micro. The micro then interprets each command and toggles the JTAG lines accordingly. I think that the programming time is slower than would be for a design which used JRunner (order of minutes for MaxII 240) but it has a minimal ram usage which is essential for our platform.  

 

 

Jim
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Altera_Forum
Honored Contributor II
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By the way, FYI JRunner is used for FPGA configuration with RBF files. Programming MAX II with the JRunner is not possible.

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