- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello,
I just tried out the new state machine editor in QII 7.2 but I can't figure out how to make ports to vectors. Is it even possible? Are there any free alternatives to make synthesizable VHDL code out of state diagrams and also support vector ports (I know that Xilinx has one but I don't want to download whole ISE to get it)? I would like to be able to maintain the design from the diagram so I prefer not to make any changes or wrappers by hand.Link Copied
0 Replies
Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page