With a "soft" ring buffer connected to the FIFOED_AVALON_UART's Rx FIFO, interrupts are obtained when data (yet to be read by the processor) is present in the FIFO.
With a fifoed_avalon_uart_rxirq() function, that assumes there is space in the ring buffer when it is called, it transfers one byte from the UART Rx FIFO into the ring buffer, increments the write pointer and then checks for the full condition.
If the buffer has become full, then the Rx interrupt source is disabled within the UART. The read() function then re-enables the interrupt once data has been drained from the ring buffer.
however, with the ring buffer full and the rx interrupt disabled, interrupts do still occur. Due to the (false) assumption by the interrupt handler that the buffer is not already full, it overwrites the buffer, causing it to change from full to apparently empty. This causes a loss of one buffer's worth of data bytes.
How does one prevent interrupts from occuring from the FIFOED_AVALON_UART when the interrupts have been disabled?
