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Audio Video Development Kit

Altera_Forum
Honored Contributor II
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We have purchased an Audio Video Development Kit, stratixII GX edition. I want to download our own design file into spansion flash through MAXII which include parallel flash loader (PFL)'s function. 

 

But I don't get the design file for the MAXII, so I don't know the configuration of its PFL, the most important is the option bit's start address. I can't convert our design(*.sof) to *.pof. 

 

How can I get this address? 

 

Thanks 

 

Nick
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Altera_Forum
Honored Contributor II
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These details should be documented in the Dev Kit user manual (they could been found in other manuals I have seen). Also, there is a standard memory mapping used with other PFL designs, also suggested in the PFL user manual, I would start with this configuration, if no other information is available. Typically the option bits are located at start of last page.

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Altera_Forum
Honored Contributor II
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Dear FvM, 

 

Thank you for your reply. 

 

I set the option bits at start of last page. When I program, I met the following error. 

 

Error: Flash Loader IP not loaded on device 1 

Error: Operation failed 

 

I don't think I get the right MAXII program file. I am using the following file. 

C:\altera\Kits\StratixIIGX_AudioVideo_Kit-v1.0.0\Examples\quartus\maxii_sdi.pof 

 

Do you have the correct MAXII program file which include PFL function?
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Altera_Forum
Honored Contributor II
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I don't know, if device 1 is actually the MAX II in JTAG chain? The error may also occur, cause you tried to connect the wrong device for PFL programming. 

 

I didn't check, if the MAX II design or image is contained in the Dev Kit files somewhere. Normally at least, a *.pof image should be provided. I don't use the Dev Kit, I included MAX II PFL with own designs. But I know from other Altera Dev Kits, that they likely utilize the reference design if applicable. 

 

P.S.: I checked with Stratix IIGX PCIe Board reference manual. I see, that device 1 is actually the MAX II in JTAG chain. Also the previously asked flash address map is documented in the manual. I didn't see a notice which MAX II *.pof design is the factory configuration, that contains an operational PFL according to the manual, but it can be expected to be shipped with the Dev Kit. (Would be the first Dev Kit that lacks the basic image files otherwise).
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