Stratix III dev kit factory Nios design fails to build (dynamic termination control)

[Altera_Forum]

When trying to rebuild the Nios II reference design (in C:\altera\72\kits\stratixIII_3sl150_dev\examples\stratixIII_3sl150_dev_niosII_standard), using Quartus II 8.0, I see the following errors: 

 Error: Bidirectional I/O "ddr2_deva_dq" uses parallel termination but does not have dynamic termination control connected Error: Bidirectional I/O "ddr2_deva_dq" uses parallel termination but does not have dynamic termination control connected Error: Bidirectional I/O "ddr2_deva_dq" uses parallel termination but does not have dynamic termination control connected Error: Bidirectional I/O "ddr2_deva_dq" uses parallel termination but does not have dynamic termination control connected Error: Bidirectional I/O "ddr2_deva_dq" uses parallel termination but does not have dynamic termination control connected Error: Bidirectional I/O "ddr2_deva_dq" uses parallel termination but does not have dynamic termination control connected Error: Bidirectional I/O "ddr2_deva_dq" uses parallel termination but does not have dynamic termination control connected Error: Bidirectional I/O "ddr2_deva_dq" uses parallel termination but does not have dynamic termination control connected Error: Bidirectional I/O "ddr2_deva_dqs_p" uses parallel termination but does not have dynamic termination control connected Error: Bidirectional I/O "ddr2_devb_dq" uses parallel termination but does not have dynamic termination control connected Error: Bidirectional I/O "ddr2_devb_dq" uses parallel termination but does not have dynamic termination control connected Error: Bidirectional I/O "ddr2_devb_dq" uses parallel termination but does not have dynamic termination control connected Error: Bidirectional I/O "ddr2_devb_dq" uses parallel termination but does not have dynamic termination control connected Error: Bidirectional I/O "ddr2_devb_dq" uses parallel termination but does not have dynamic termination control connected Error: Bidirectional I/O "ddr2_devb_dq" uses parallel termination but does not have dynamic termination control connected Error: Bidirectional I/O "ddr2_devb_dq" uses parallel termination but does not have dynamic termination control connected Error: Bidirectional I/O "ddr2_devb_dq" uses parallel termination but does not have dynamic termination control connected Error: Bidirectional I/O "ddr2_devb_dqs_p" uses parallel termination but does not have dynamic termination control connected I tried removing the SDRAM entirely from the system, but I'm not quite sure I did that right, as the resulting design took up suspiciously little resources.  I started afresh and then regenerated the system in SOPC Builder, after seeing a note on a similar issue with QDR II SRAM in the Quartus 8 release notes that suggested regenerating the ALTMEMPHY MegaFunction, but still saw the same errors.  Has anyone successfully built the stock Nios II reference design for this dev kit in Quartus 8? I'd love to use it as a basis for embedded system development.

[Altera_Forum]

Do you have any update on this yet. I have filed a service request too with this exact same problem.  

 Thanks.   -Art

[Altera_Forum]

I just opened a service request on this, too. Haven't heard anything yet, but will post here when I do.

[Altera_Forum]

Got a response today from a support engineer at Altera that solved this problem: 

 "In ddr2 Megacore, the OCT feature is not set in PHY setting TAB. So these constrains are redundant. In version7.2, the tool doesn’t check relevant constrains strictly. However from version8.0, the tool checks them strictly, so these error messages are reported. You may open Assignment->Assignment Editor in Quartus, search those pins, in Assignment Name column you may find INPUT_TERMINATION, in Enable column, change Yes to No for all those pins. Save the changing and recompile the project."