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Altera Jtag and Active Serial Programming Protocol

Altera_Forum
Honored Contributor II
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Hi all, i an new to this forum and hope you all can give me a hand on the problem i face. 

 

Currently i m working on a project to implement an independent stand-alone Altera programmer by using Altera FPGA chip to program on the other FPGA chip. 

 

In Quartus II programmer, there are 2 type of programming mode which is ASP mode and Jtag mode. Is there any reference document or firmware source code regarding on how the programmer write to or read from FPGA? 

 

I will appreciate every information provided to me. Thank you. 

 

-LavenderPuppy-
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Altera_Forum
Honored Contributor II
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hi lavenderPuppy 

 

You can begin in looking at the handbook of the device you're using. There is a chapter named "Configuration 'YourDevice' device" ('YourDevice' could be cycloneII, stratixIII, etc...) where all configuration schemes are explained in details. 

 

Regards,
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Altera_Forum
Honored Contributor II
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Thx for the advice, i will take a look on the handbook. =) 

 

-LavenderPuppy-
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