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Hello,
Are there any documents that give further elaboration on the 'PCI Express High Performance Reference Design' (Application Note 456)? Specifically, I am looking for a register description of the DMA control registers. AN 456 does a good job of explaining the general flow of operation, but does not give offsets for the important DMA control registers that would allow an application programmer to write a driver against. My goal is to write a Linux driver that uses the dev board reference design. In the end, I will have to modify the driver and reference design to fit my own project. Thanks.Link Copied
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The High Performance reference design uses the Chaning DMA Example Design that is provided with PCI Express Compiler. See Chapter 7 of the pci express compiler user guide (http://www.altera.com/literature/ug/ug_pci_express.pdf) for a description of the registers used in this design.
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The register description is just what I needed. Thanks for the reply.
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