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LVDS issue with cyclone III

Altera_Forum
Honored Contributor II
‎07-23-2008 03:43 PM
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I am trying to modify the NiosII reference design of the Cyclone 3c120 FPGA development board. Some i/o's of the hsma connector have to be used as LVDS signals.  

When I assign pins hsma_tx_d8 (L7 and L6) as LVDS, the fitter reports: "Error: Pin "hsma_tx_d8" requires a pseudo-differential I/O assignment". Anybody can give me a hint what could be the reason? I cannot find anything regarding this error message. I/O Voltage for this bank (bank1) is 2,5V. Other signals of this bank have standard 2,5V I/O or also LVDS.  

 

Any ideas? I don't have experience with LVDS yet - the start seems to be a little difficult.. 

 

Thanks for help, 

Christian
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Altera_Forum
Honored Contributor II
‎07-24-2008 08:52 AM
389 Views

I/O standard LVDS has to be assigned to the p pin (L7) only. L6 will be assigned automaticly by the fitter. According to the pin-out file, the pin is supporting LVDS standard.

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Altera_Forum
Honored Contributor II
‎07-25-2008 01:40 PM
389 Views

In the pin planner just set positif pin lvds

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