Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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V8 Timing Analyser differences from V7

Altera_Forum
Honored Contributor II
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Hi, 

I re-ran a Stratix1 design that passed on V7 through V8 & found that the classic timing analyser now reports setup failings. 

In some case signals that had a slack of aprox 0.9 ns now have a negative slack of 0.1 ns. This is a 1 ns difference. 

I am investigating further as to which I should trust but just in case someone else has met this - perhaps it's some default change...
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Altera_Forum
Honored Contributor II
323 Views

Just a quick update, have found that with DSE I can get better results. 

I needed to use DSE on this design before, so I gusess it was foolish to assume that the same seeds would give the same/better results.
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Altera_Forum
Honored Contributor II
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The value of the Fitter seed setting that gives the best results applies only to the current state of the design. If you change source code, synthesis settings, Fitter settings, timing requirements, or tool version, then the optimal seed value will likely be different. 

 

A related point is that you need to do a seed sweep of the before and after conditions to thoroughly compare them. If you think a newer version of Quartus gives worse results, then compile multiple seeds with the older and newer versions to see whether the newer version really is worse on average. Almost always you will find the newer version to be about the same or better (barring a change in Quartus settings), but there are exceptions. It is not unusual for a slack to vary by 1 ns from one seed to the next, so a 1 ns difference when comparing one compile with the older version and one compile with the newer version doesn't really tell you how the versions compare on your design. You might be seeing just the random variation.
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