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I am fairly new to FPGA programming, and I have a simple and probably easy question, but I am going to ask it anyway:
When a chip pinout has differential pin pairs, but says that they can be used as user I/Os when not needed for differential signaling, is there going to be an issue using the negative pin as a single-ended signal? Does the FPGA do some sort of automatic inversion on the signal regardless, or is the inverted pin function only applicable when it is configured in the firmware as a differential pin? Hope this makes sense... Thanks!Link Copied
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--- Quote Start --- ... or is the inverted pin function only applicable when it is configured in the firmware as a differential pin? --- Quote End --- That is how it works. You don't need to do anything special when placing a single-ended signal at a pin location that optionally supports the n leg of a differential pair.
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Great - that makes things much simpler. I was afraid that I'd have to invert every one of the signals using the n pin...
Thanks for the help!
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