No Pin Assignments

[Altera_Forum]

Is there an option in Quartus II to allow synthesis, fitting and routing and have it use/assign no I/O pins? I need to compile some sub-blocks alone to determine resource utilization and they have too many I/O pins for the present device when compiled alone.

[Altera_Forum]

Use the "Virtual Pin" setting for most top-level ports of this part of the design other than clocks. See the Quartus handbook, Volume 2, Section III, Chapter 10 for the kinds of ports that cannot be virtual pins.

[Altera_Forum]

Thanks Brad, I'll check that section out. 

Does my method for determining resources for "old" code with a "new" component seem logical or would you recommend a simpler or more accurate method?

[Altera_Forum]

If you mean compiling a subblock alone to determine resource usage, that's fine. The Logic Utilization number will be good and the memory and DSP block numbers might be too as long as significantly different resource balancing doesn't happen when compiling a block alone. Ignore LAB and ALM utilizations for any design that does not use nearly all the logic resources; the Fitter spreads logic out in more LABs and ALMs than necessary when it can to avoid tight packing that could impair performance or routability. 

 If you have report files or can recompile the original complete design, you can get the resource usage of the lower-level blocks from the Analysis & Synthesis and Fitter "Resource Utilization by Entity" tables.

[Altera_Forum]

Thanks again. Do you believe the old resource utilization, from a Stratix II, would hold closely to a Stratix III part? Still have those numbers but management thinks the Stratix III implementation should be "much" smaller. I'm going to try the virtual pin option as a test.

[Altera_Forum]

Why would SIII be much smaller? There are some differences, but by and large I would consider them to be the same. (I'm also not a fan of assuming the parts are equal to the whole. It works for a decent estimate, but for fuller devices is not 100% accurate).

[Altera_Forum]

If the design uses lots of RAM, then the different size RAM blocks and the availability of MLAB in Stratix III might make Stratix III better for this design. I think Stratix III had an enhancement to the DSP blocks too.