ModelSim Altera and megafunction

[Altera_Forum]

Hi, 

 if some trouble with ModelSim Altera Edition and megafunction. I use the Quartus II Native Link feature to call ModelSim for the RTL simulation. My design uses the clock_pll megafunction block. All other modules are written in verilog. Modelsim always complains: ALTERA version supports only a single HDL# ** Error: (vsim-3039) ..... Instantiation of 'clock_pll' failed.  How can I fix this issue?  Thanks a lot  Peter

[Altera_Forum]

You should use the gate level simulation.

[Altera_Forum]

>You should use the gate level simulation. 

I partially agree. But this is always very slow.!!!

[Altera_Forum]

You shouldn't need to use gate level simulation. 

 I assume you mean altpll megafunction, I can't see any megafunction named clock_pll. Possibly clock_pll is the name of your variation file, and you used VHDL when creating the megafunction variation.  When you invoke the MegaWizard, you can select the HDL language for your variation. Make sure you are selecting Verilog.  But note that most designs don't require a full PLL simulation model for RTL level simulation. I usually add a small dummy PLL module to the testbench.

[Altera_Forum]

As vjAlter states, Altera PLLs are generally correctly simulated also by ModelSim functional simulation. This is an important feature, cause gate-level simulation, besides it's slow operation, hasn't much worth in code debugging. It's mainly useful to check the timing of a design. 

 I think, it may be a problem of specifying the required libraries for the simulation. Cause I'm mostly using VHDL, where the library references are part of the code, I don't have to care for this issue. As another point, when simulating PLLs, the simulator resolution must be always set to 1 ps.