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dear friends
i have created block design file in this block design file when i connect bus to several nodes using aliases it gives,error is given below
error: node "l0" is missing source
error: node "l1" is missing source
error: node "l2" is missing source
error: node "l4" is missing source
error: node "l5" is missing source
error: node "l6" is missing source
error: node "l7" is missing source
error: node "l8" is missing source
error: node "l9" is missing source
error: node "l10" is missing source
error: node "l11" is missing source
error: node "l12" is missing source
error: node "l13" is missing source
error: node "l14" is missing source
error: node "l15" is missing source
error: node "l3" is missing source
error: quartus ii analysis & synthesis was unsuccessful. 16 errors, 23 warnings
error: peak virtual memory: 172 megabytes
error: processing ended: thu oct 16 10:05:01 2008
error: elapsed time: 00:00:05
error: total cpu time (on all processors): 00:00:04
error: quartus ii full compilation was unsuccessful. 18 errors, 23 warnings
i am trying to connect these nodes to bus (led_bus) with alias l[21..0]
hareesha
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--- Quote Start --- dear friends
i have created block design file in this block design file when i connect bus to several nodes using aliases it gives,error is given below
error: node "l0" is missing source
error: node "l1" is missing source
error: node "l2" is missing source
error: node "l4" is missing source
error: node "l5" is missing source
error: node "l6" is missing source
error: node "l7" is missing source
error: node "l8" is missing source
error: node "l9" is missing source
error: node "l10" is missing source
error: node "l11" is missing source
error: node "l12" is missing source
error: node "l13" is missing source
error: node "l14" is missing source
error: node "l15" is missing source
error: node "l3" is missing source
error: quartus ii analysis & synthesis was unsuccessful. 16 errors, 23 warnings
error: peak virtual memory: 172 megabytes
error: processing ended: thu oct 16 10:05:01 2008
error: elapsed time: 00:00:05
error: total cpu time (on all processors): 00:00:04
error: quartus ii full compilation was unsuccessful. 18 errors, 23 warnings
i am trying to connect these nodes to bus (led_bus) with alias l[21..0]
hareesha
--- Quote End --- Hi Hareesha, without seeing the schematic it is difficult to say what's going wrong. I assume that you split the bus I[21..0] into single nets and you forgot to use the brackets in the netname. E.g I[21..0] single netnames I[21]. I[20] ....
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I agree with pletz, just have a look at:
http://www.alteraforum.com/forum/showthread.php?p=13864#post13864- Mark as New
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Ya it worked,thanks for help.
regards hareesha
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