Hi Guys,
I am new in this field so I don't have much experience. I assigned my output port to 0 like this:
module acm_top (
....output bmc_csa_l, output bmc_csb_l,
.....
);
.... assign bmc_csa_l = 1'b0; assign bmc_csb_l = 1'b1;
...
The synthesized circuit acted right after I programmed the chip but the next time I powered up the circuit, it set
bmc_csa_l tohigh which is not acting as my code.
I did try to assign this port to a register and reset it but my circuit lacks the reset input and it still not worked
module acm_top (
....output bmc_csa_l, output bmc_csb_l,
.....
); ...
reg [1:0] rbmccs;
...
assign bmc_csa_l = rbmccs[0];assign bmc_csb_l = rbmccs[1];
... always @ ( posedge core_clk or posedge rst ) begin rbmccs[0] <= 1'b0; rbmccs[1] <= 1'b1; end .... It's not just this two pins didn't work, some other pins as well. Did anyone experience same issue? Please help me solve this problem, thanks!
