unrecognised objects in Quartus

[Altera_Forum]

hi everyone, 

 i'm experimenting with my DE1 board and i've come across something strange. When coding (VHDL) I first use modelsim for simulation and syntax checking. Then the code goes straight trough quartus for mapping to hardware. I've made this program and modelsim compiles it without complaining, but with quartus (8.1, free edition) i get this response:  Warning (10445): VHDL Subtype or Type Declaration warning at gol.vhd(323): subtype or type has null range Error (10344): VHDL expression error at gol.vhd(323): expression has 4 elements, but must have 8 elements Error: Can't elaborate top-level user hierarchy Error: Quartus II Analysis & Synthesis was unsuccessful. 2 errors, 1 warning  And the specific line is: neighbours := "000" & prev_obj_reg(word_counter)(obj_counter DOWNTO obj_counter+1) & obj_reg(word_counter)(obj_counter+1) & next_obj_reg(word_counter)(obj_counter DOWNTO obj_counter+1); With this declaration: TYPE registerType IS ARRAY (INTEGER RANGE 0 TO 6) OF STD_LOGIC_VECTOR(15 DOWNTO 0); SIGNAL obj_reg,prev_obj_reg, next_obj_reg : registerType; VARIABLE neighbours : STD_LOGIC_VECTOR (7 DOWNTO 0);  When I delete the "000" I get the error "Error (10344): VHDL expression error at gol.vhd(323): expression has 1 elements, but must have 8 elements", so Quartus does not seem to recognise the concatenated elements from the registers.  Please help me fix this

[Altera_Forum]

Hi DotS, 

 obvious error is here: (obj_counter DOWNTO obj_counter+1) means, for example ( 0 downto 1). It's incorrect. You should write (obj_counter TO obj_counter+1) or (obj_counter DOWNTO obj_counter-1).  Therefore syntesis accepts only one part of expression: obj_reg(word_counter)(obj_counter+1);

[Altera_Forum]

Thanks you for your response, i will try it. It's strange though because at first I had typed (obj_counter TO obj_counter+1) but modelsim complained because it's not in the same direction as the declaration.