HSMC pinout for THDB-ADA with Cyclone III starter kit

[Altera_Forum]

Hi 

 I would be enormouosly grateful if someone can help. We purchased a Cyclone III starter kit and AD/DA daughter card from Terasic. The connection is through an HSMC connector but I am unable to correlate between the ADA board schematic provided by Terasic (Obtained from http://www.terasic.com/downloads/cd-rom/ada/ (http://www.terasic.com/downloads/cd-rom/ada/) ) and the Altera CIII starter kit reference manual (obtained from http://www.altera.com/literature/lit-devkits.jsp (http://www.altera.com/literature/lit-devkits.jsp)).   For example, in the reference manual table 2-9, there is a conversion table  of HMSC pin to FPGA pin and the HSMC signal names. However, many of the HMSC pins shown carry signals from theh ADA board in Terasic's Schematic do not exist in this table. Hence, I am completely bewildered at how to reference and the control the ADA board in the Quartus 2 software. For example, according to the Alters document, there are no FPGA pins assigned to HSMC pins which the Terassic document says carry most of the bits from the analogue to digital converter.   If someone knows the correct pin configuration or can see that I am making a mistake I would greatly appreciate your advice.   Thanks   Ben.

[Altera_Forum]

The Terasic ADA Board schematic is contradicting Altera HSMC specification (e.g. has more pins), so at least the schematics is wrong. Ask Terasic.

[Altera_Forum]

Thanks FvM 

 I had contacted Terasic the previous week but only got a reply after posting. They say that when attaching the ADA to the CIII starter kit that the conector is 'upside down', hence the confusion. However, no interpretation of :upside down: that I am aware of can help translate the Altera document to the Terasic HSMC pin out. The total number of pins is the same but the Altera reference document only give entries fro HSMC pins that correspond to pins on the FPGA.   If anyone else has been through this or has some code to simply exchange signals between the ADC to FPGA and FPGA to DAC, I would be most grateful.   Thanks.

[Altera_Forum]

Yes, I guess the boards pinouts are fitting the starter kit. I found that there are two different issues with ADA HSMC pinout, when you map it to the official HSMC specification, respectively the Altera boards, that are keeping it strictly. 

 The first point is the mirrored upside-down position, the second the fact, that HSMC uses a 40 pin DP configuration in one bank and a 60 pin standard configuration in the others, resulting in difference of 20 "numbered" pins, with respective gaps in the DP footprint.  Cause Altera has issued an official HSMC reference document, to my opinion Terasic isn't free to use an arbitray pin numbering. At least the different pin numbering must be clearly mentioned in the schematic. The mixed DP/non-DP issue is a built-in confusion of the HSMC standard, the choosen HSMC pin numbering doesn't seem well-considered. It would have been wiser to use the standard connector numbering with gaps in the DP bank, I think.  To prevent from such confusion, the HSMC spec should suggest a numbering scheme for the 20 gap pins as well and require it's usage obligatory upon all implementations.

[Altera_Forum]

Just look in the CIII starter kit folder of the examples folder of the ADA software. 

In QB3_TOP.v you'll find lines like:  assign a2dba = {HSMC_RX_P[10],HSMC_RX_N[10],HSMC_RX_P[11],HSMC_RX_N .....  Just look up the pin locations to the corresponding signals in the CIII starter kit reference manual  Additionally I added a pinout of an example project.  cheers, Philipp

[Altera_Forum]

Thanks Phillipp, 

I managed to sucessfully copy the ports and pinout from the reference design and am able to successfully transmit the input to AD Ch. A to both outputs but the input signal at AD Ch. B is distorted and I think this is due to a discrepancy with the pin assignment. Specifically, the Altera documentation gives the pinout for HSMC_TX_N10 as E18 but this is not available for use since, as shown in your pinout, this is a 'RESERVED_OUTPUT_OPEN_DRAIN'. The ref design used pin D18 for this but I suspect this (or some other pins) is/are not correct as it seems some bits of the input signals are missing.   Have you any ideas how to solve this??   Thanks   Ben.

[Altera_Forum]

--- Quote Start ---  Specifically, the Altera documentation gives the pinout for HSMC_TX_N10 as E18 but this is not available for use since, as shown in your pinout, this is 'RESERVED_OUTPUT_OPEN_DRAIN'.  --- Quote End ---   nCEO is a reserved pin cause you didn't change the settings in the Device Options menu for dual-purpose pins. It's not used by the design and thus fully available.

[Altera_Forum]

Yes, that was the problem. 

 Thanks for your help!

[Altera_Forum]

--- Quote Start ---  Yes, that was the problem.   ===========Thanks for your help!  --- Quote End ---   ===================================================   Hi, Please send me the complete QUARTUS project to test THDB-ADA daughterboard with Cyclone III starter kit.I have tried everything but it doesn't give the signal output.Please send me in my email account: nd_khan@yahoo.com     With regards. Khan

[Altera_Forum]

Hi Ben?, 

 I am learning FPGA and VHDL now. I have using same boards as yours. Would you mind send me your projects' files to me？I would like to have a study. My email is peipeihu1992@gmail.com  Thank you very much.  I will be so appreciate about that.  Peipei   --- Quote Start ---  Yes, that was the problem.   Thanks for your help!  --- Quote End ---