real time recognition engine

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

real time recognition engine

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Hi, i'm doing a project about voice recognition and it has many ip core without licence. Therefore, the ip core can be used in a time limited (1 hour). I've tried to program and i' getting this

https://alteraforum.com/forum/attachment.php?attachmentid=13761&stc=1

i dont know whether is it correct or not. In this project, i have to use NIOS II after programing in FPGA but i get an error when i build the project in NIOS II

https://alteraforum.com/forum/attachment.php?attachmentid=13762&stc=1

I'm using quartus II 11.0 web edition and Altera DE2

how can i overcome this problem?

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