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About the initialization of the DDR3 PHY

Altera_Forum
Honored Contributor II
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Hi: 

We need to use the DDR3 UniPHY in the FPGA project, the UniPHY contain the AFI interface and DDR interface . because of lacking of the UniPHY document, we don't know how to initialize the UniPHY. 

Is there someone can provide the initialization sequence or the document. 

 

thank you in advance!
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Altera_Forum
Honored Contributor II
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I'm not sure I understand what you mean by not having the document: 

 

https://www.altera.com/support/literature/lit-external-memory-interface.html
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