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SOPC System w/ Quartus II

Altera_Forum
Honored Contributor II
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Hello everybody, 

 

Im trying to connect a NIOS II processor to a custom IP component using SOPC builder. After that, i want this design to be implemented ona a Cyclon III FPGA. I'm having trouble to do so, maybe someone can help me. 

I did the following things until yet: 

I started Quartus II software and made a new project using the Project Wizard. I chose the directory, named the project an the top-level design entity "FinalR10", selected the right FPGA and then finished Projet Wizard. Then i selected File-->New--> SOPC Builder System. I generated the system with one NIOS II processor, a on-board RAM, a on-board ROM and the custom IP component. SOPC System Builder says: 

Info: System generation was successful.Than I press CTRL+K in Quartus II software, so I can make the pin assigments, but Quartus II says: 

Error: Top-level design entity "FinalR10" is undefined Error: Quartus II Analysis & Synthesis was unsuccessful. 1 error, 0 warningsSOPC created a file called FinalR10.vhd, with the following content: 

--megafunction wizard: %Altera SOPC Builder% --GENERATION: STANDARD --VERSION: WM1.0Can anybody help me and tell me what I do wrong? 

 

magixD 

 

edit: 

sorry, I forget to mention, I'm using Quartus II 9.0 SP2
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Altera_Forum
Honored Contributor II
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instead of set FinalR10 as the top level entity, create an instance of it in other entity and set this one as the new top level entity. 

 

system0: FinalR10 port map ( .. .. .. );
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Altera_Forum
Honored Contributor II
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You can certainly set the SoPC system to be your top level if you really want to. There are a host of reasons why not to do this but hey it's all up to you. Before trying to run the pin planner I would at least run "Analysis and Elaboration" on the project first. This will give Quartus the chance to examine all the source files for the project and create the project hierarchy.  

 

Jake
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Altera_Forum
Honored Contributor II
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Thanks for the replies! 

 

I found out that the SOPC system generation was NOT successful. The last line of the *_log.txt says "error in processing. system not successfully generated.", although the last line in the System Generator window says "info: system generation was successful.

 

I found out that my custom component is the problem. If I creat a SOPC system only with NIOS and the two on-board memorys, everything works fine. Analyses & Synthesis work fine, the pin assignment work fine, full compilation works and also the programming works fine. The *_log.txt has 70 lines and ends with "success: system generation completed." (see attachment sopc_log.txt). 

If I add the custom component to my design, the log-file has 6411 lines and ends with and fails with eval failed on this ptf-string: $ptf = ['SYSTEM SOPC' ,[ 'System_Wizard_Version = "9.00"', 'System_Wizard_Build = "235"', 'Builder_Application = "sopc_builder_ca"', ... The entire error message is in the attachment sopc_log.w_component.txt

 

I created the component using the SOPC Component editor. It has three avalon interfaces: one clock-sing, one mm-slave and one conduit. The TLC- and PTF-file are also in the attachment 

Can anybody help me out and tell me what I did wrong? 

 

 

--- Quote Start ---  

You can certainly set the SoPC system to be your top level if you really want to. There are a host of reasons why not to do this but hey it's all up to you. 

--- Quote End ---  

 

So you would also recomment to write a instance of the SOPC system and make this my top level design entity? Are there other possibilities, and what is the "usual" way to use an SOPC system in Quartus II? 

I could not find any documents that discribe the interaction between Quartus and SOPC Builder (I already took a look at the Quartus II Handbook, Volume 4) 

 

magixD
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Altera_Forum
Honored Contributor II
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I foud the "bug": i used hyphens in the modul-name, but SOPC can only handle underscores. 

 

Is there any reason, why SOPC has so much problems with hyphens, blanks, and so on? I mean where in the 21. century, the DOS-era is over...
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Altera_Forum
Honored Contributor II
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Yeah I had the same thing happen when I accidentally put a space in the component name. 

SoPC builder is doing a lot of work and there are a lot of programs and languages involved. I know at the very least that SoPC builder uses TCL, PERL, and JAVA. I'm willing to live with it but it would be nice if it told you what the problem was. 

 

Jake
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Altera_Forum
Honored Contributor II
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I guess it is more a question of ancient code than of complexity. But I'm fine, now that I know what works and what not :) 

 

magixD
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Altera_Forum
Honored Contributor II
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SOPC builder is generating VHDL or Verilog code without modifying or checking the names of the components. So to avoid problems, you should ensure that all the names are valid VHDL/Verilog labels.

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Altera_Forum
Honored Contributor II
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You're right, I forgot that the module names have to go with Verilog/VHDL naming standard. So it was my fault, SOPC is working fine! :)

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Altera_Forum
Honored Contributor II
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It's not entirely your fault... In an ideal world, SOPC builder would display an error message saying that the name of the component contains illegal characters before it generates the system, or automatically replace illegal characters by something else... In the real world, we just need to be careful ;)

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