time-limited licence problem

[Altera_Forum]

Hi all, 

I modified the Quartus II Project File using SOPC builder and then recompiled it using Quartus II so the file got generated with the time-limited licence version of the Quartus II. Now I am not able to burn the time_limited.sof file on the board. How to overcome this problem?  Thanks & Regards, Nishant

[Altera_Forum]

Do you have a valid licence file (subscription you must pay for once per year) ? 

i had once a problem with the licence server and therefore quartus generated time limited files you cannot programm, but after the licence was available again, the quartus tools still used the time limited files instead of the normal programming files. time limited means you cannot create production images, only for evaluation purposes. some may run only 1 hour, other as long as there is an active jtag connection and quartus running. as you use sopc, as far as i know you need a subscription licence and not a web licence.

[Altera_Forum]

Thanks for the reply. 

I have downloaded a license from Altera site. And I have been using it. Actually I wanted to modify the QPF file because I am not able to run uart i.e. serial communication program. Is there any other way to solve serial communication problem? Does uart_0 needs to be connected to the instruction master in QuartusII? The program is not running in the Instruction Simulator mode also.  Thanks, Nishant

[Altera_Forum]

In the past you had to download a valid licence from altera web site as for the web edition but this would also only generate time limited files. only the paid subscription edition generates non time limited files. 

 instruction masters are as the name already says for the nios cpu instructions. your uart needs to be connected to the data master. no need for a instruction master cnnection.  what do you want to modify inside the qpf to get rid of your uart problem ?

[Altera_Forum]

Someone on this forum told me that  

"there is something absolutely wrong in the way in which you incorporated your UART in the VHDL/verilog project.   if the QUARTUSII isn't giving any kind of errors while compiling your project, atleast you can check the warnings to get an idea.   I think it is something basic that you are missing out here"  about the uart problem that's why I was checking the qpf file for if anything needs to be changed or added.  I am trying to run this simple program: int main() {  FILE* fp;  char prompt=0;   fp = fopen("/dev/uart_0", "w+");  fprintf(fp,"AT+BTW0021D226A29E\r\n");   while(1){  prompt = getc(fp);  printf("%c", prompt);  }  fclose(fp);  return 0; }

[Altera_Forum]

as your code shows no uart initialisation, i guess you have setup the uart with sopc builder to the desired speed, databits .... 

 have you checked with a scope that if you put a character to the uart, you can see it on the txd line ? maybe you need to uncheck hardware flow.  is your uart labeled uart_0 inside sopc builder ?  the qfp does not hold uart relevant informations except hardware related like fast input output registers, pin assignments.  so i agree you should basically check if your whole designs runs as expected. also you can add signal tap and monitor the uart activities. and the ide gives you the possability to debug your system and play with the uart by hand by alternating its registers.

[Altera_Forum]

Thanks for the so much useful information! 

 I have configured the hyperterminal as per the uart settings in system.h file.  I did not check the txd line but even if I constantly send a character it is not received on the hyperterminal.  uart is labeled uart_0 inside sopc builder and system.h as well.  I am able to run jtag_uart and other example programs.   I will try monitoring the registers in the debug mode as you have suggested. Is signal trap also available in the debug mode because it was not mentioned in the tutorial?  Kindly guide me about how to proceed developing applications using peripherals using cycloneII. Thanks a lot!!!

[Altera_Forum]

if you do not receive a character, check if your uart is setup as hardware flow control. if that is the case and your rts cts are not correctly setup then the uart will not transmit a character, but you would see that in debuging mode. 

 signal tap is tool you can add inside quartus. you need to add inside signal tap the stuff you want to monitor and then need to recompile your design. once signal tap is added you can monitor these signals with quartus.  recheck your pin definition maybe you have reversed txd rxd direction, a common mistake. i highly recommend to have a look at the hardware pins to see if the change their levels when you try to send out a character.  altera has some guides on their web site

[Altera_Forum]

I am trying to learn things from the Altera Online Training.  

 I have QuartusII and NiosII version 6.0. Do I need to and how to upgrade them? Because in SignalTapII training course it's written that it atleast requires QuartusII 8.1.  I am not using hardware flow control but I am checking other things also as you have mentioned.  Thanks for the great help!!!

[Altera_Forum]

if you want to upgrade, just visit the altera web site, follow the link to the download center (top right corner of the main web site) 

 if you have a paid licence the go for the subscription edition, otherwise the web edition. both lead you to a button "SOFTWARE" just click it and follow the instructions.  i highly recommend to upgrade as realy a lot of things have changed and being improved since Quartus V6  Latest Version is V9 with service pack 2

[Altera_Forum]

Thanks MSchmitt for clearing even the smallest and so many doubts & questions and guiding so well. 

 Thanks a lot.

[Altera_Forum]

Hi MSchmitt, 

I have "Cyclone II EP2C20F484C7" on the board and I have full_featured, small, standard etc versions for niosII_cycloneII_2c35 which do not work on my board. I do have a few EP2C20F484 based project files in Altera\Kits\CycloneII_Starter_Kit-v1.0.0\Examples\ directory which I can not modify and compile due to web edition of quartusII.  What do I need to do to develop my own applications with the available resources?  I am also downloading NiosII and QuartusII 9.0 web edition but does it support "Cyclone II EP2C20F484C7" chip? Because with 9.0 also I won't be able to modify the project files.  Thanks

[Altera_Forum]

The Webdition should be able to modify and compile these projects. 

the limitation should be that you won't be able to generate production code meaning the stuff will only work as long as there is an active jtag connection to quartus and or only 1 hour after reset und must be restartet. so evaluation on your desktop shouldbe possible  things may have changed with quartus v9. as i have the subscription edition. there is a nios package available maybe you need to install it too ?  but you could install the subscription edition and if it askes for a licence then you enable 30 day trial  with quartus up to 8.1sp2 it was possible to generate a new project open sopc create your own system and then compile via quartus and run it on the target. but no production possible  so i guess this must be possible with quartus 9

[Altera_Forum]

In the SOPC builder, in the 'Board' drop down box there is no CyclneII(EP2C20) option so I select the 'Unspecified Board' option but files so generated do not work.

[Altera_Forum]

Hi, 

I have a built a project using in 'Embedded_Systems_Lab ' from http://www.nioswiki.com/embedded_systems_lab. But when I try to create an application using this built system I get the error "Software Settings (STF) file associated with thi project is damaged Reason : java.net.MalformedURLException: unknown protocol: c".  How to overcome this problem?  Thanks a lot

[Altera_Forum]

Do you have a space in your project path? It's the primary source of strange error messages in the IDE

[Altera_Forum]

The problem is solved and I could create the project successfully. 

There was a space in the project path which was causing the error.  Thanks for the reply!!!