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I remember the ucf file is used in xilinx ISE,but i'm a newbie in quartus,i think the ucf file is simple and i can change it any time when i want to change the pin assignment or time constraint,so any one can help me or direct me to a step by step manual for quartus project using verilog or vhdl?
thanks! chrisLink Copied
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Quartus can use multiple constraint files (just like ISE). The main Quartus file is the ".QSF" file. This file contains project settings, pin assignments, etc. For timing analysis, Quartus projects using the TimeQuest timing analyzer use a ".SDC" (synopsys design constraints) file.
The following page contains all Quartus documentation: http://www.altera.com/literature/lit-qts.jsp Toward the bottom of the page there is a "Getting Started" section. Jake
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