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Opencores MAC 10/100 Driver

Altera_Forum
Honored Contributor II
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Hi Everyone 

 

Please feel free to use these files and/or comment on them. I've written them as a driver for the opencores mac solution. I have been using them with the lwip web server example that comes with the nios II installation and they seems to work. 

 

I've attached a zip file with three files in it: 

OpenCores_Ethernet_MAC_regs.h - contains the definitions of the registers inside the opencores MAC component. 

OpenCores_Ethernet_MAC.c and the matching h file is the actual driver. 

 

I've used these files in conjuction with files that come with the Nios installation, which I can't post here for obvious reasons. What I did was to make a copy of the altera_avalon_lan91c111 directory, name it accordingly and replace the file in the HAL\inc and HAL\src as well as the regs file in the inc directory with the file I've attached. I hope this helps someone. 

 

Nir
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Altera_Forum
Honored Contributor II
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Hi everyone 

 

Somebody braught to my attention that the zip file I've posted does not contain an STE100P.h file that one of the source files include. Initially It actually didn't include this file, since I used the STE100P phy chip in my project, but you can use different chips to do the same job. However, since there is no prevention for me to post this file as well, here is an ammended zip file with the STE100P.h file in it. 

 

Sorry for that 

 

Nir
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Altera_Forum
Honored Contributor II
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Hi nir, 

 

I use Mtx Cyclone Dev.Board, and the OpenCores MAC 10/100 Core can be used on board. 

 

But I do not know clearly how to implement the simple_socket_server project by using the Mac and your driver under Nios II IDE. 

 

Can you give me some detailed information or guide? 

 

Thank you very much.
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Altera_Forum
Honored Contributor II
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Hi everyone, 

 

I'm using a Cyclone board with an Opencores MAC 10/100 IP ver. 2.0 and a National DP8847 PHY. 

 

I wrote the application using nir's driver, but when I run it the driver stucks when accessing the MAC MODE register: the sthio instruction does not return. 

 

Any idea about what could be wrong with my design ? 

 

Thanks a lot
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Altera_Forum
Honored Contributor II
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Sorry, this is also a test, 

forgot it
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Altera_Forum
Honored Contributor II
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Hi LiangYi 

 

What kind of PHY chip do you have on the Mtx board ? 

 

Nir
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Altera_Forum
Honored Contributor II
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Hi nir, 

 

The PHY on my Mtx.board is TDK 78Q2120-64T. 

 

LiangYi.
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Altera_Forum
Honored Contributor II
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Hi 

 

The driver I've written works with the ST PHY chip called ST100P. If you want it to work with your device, you'll need to create a file similiar to the ST100P.h file for you device, in which you should define the device's registers. YOu also need to make sure you perform any required changes to make Opencores_Ethernet_Mac.c configure the phy chip correctly (look in read_phy, write_phy and configure_phy functions as in any ither function you think may need a change. 

 

I hope this helps. 

 

Nir
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Altera_Forum
Honored Contributor II
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I will try it. 

 

Thank you very much.
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

originally posted by nir@Jan 4 2005, 04:49 PM 

hi everyone 

 

please feel free to use these files and/or comment on them. i've written them as a driver for the opencores mac solution. i have been using them with the lwip web server example that comes with the nios ii installation and they seems to work. 

 

i've attached a zip file with three files in it: 

opencores_ethernet_mac_regs.h - contains the definitions of the registers inside the opencores mac component. 

opencores_ethernet_mac.c and the matching h file is the actual driver. 

 

i've used these files in conjuction with files that come with the nios installation, which i can't post here for obvious reasons. what i did was to make a copy of the altera_avalon_lan91c111 directory, name it accordingly and replace the file in the hal\inc and hal\src as well as the regs file in the inc directory with the file i've attached. i hope this helps someone. 

 

nir 

--- Quote End ---  

 

Hi Nir, 

 

I have few things to ask you for Opencores Ethernet Hal Driver 

 

1) In case of ucosII is not there I think you one more file is missing that is "alt_ethernet_dev.h". This is defined in file "OpenCores_Ethernet_MAC.h" 

 

Here is the code excerpt from file "OpenCores_Ethernet_MAC.h" 

# ifndef __ucosii__ 

# include <stdlib.h># include <stdio.h># include "alt_types.h"# include "system.h"# include "alt_ethernet_dev.h" 

 

 

2) In case of ucosII is there, I couldn&#39;t understand from dev structure is initialized. in following macro. Also how routines for initializing Ethernet Ip and Recive Data from interface are initialized if this dev structure is not initialized? 

 

# else 

# define OPENCORES_ETHERNET_MAC_INIT(name, dev) 

# define OPENCORES_ETHERNET_MAC_INSTANCE(name, dev) 

# endif /* __ucosii__ */
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Altera_Forum
Honored Contributor II
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Hello 

 

Regarding question number 1, you are right and the mentioned h file should be included. 

Regarding question number 2: I have not tested this code with ucos, so I can&#39;t say if it works and how. 

 

Nir
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

originally posted by nir@May 11 2005, 05:38 PM 

hello 

 

regarding question number 1, you are right and the mentioned h file should be included. 

regarding question number 2: i have not tested this code with ucos, so i can&#39;t say if it works and how. 

 

nir 

--- Quote End ---  

 

From where do we get alt_ethernet_dev.h?
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Altera_Forum
Honored Contributor II
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Hi Manish 

 

You should find it under your installation path, but in case you don&#39;t here is the one I have. 

 

Nir
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Altera_Forum
Honored Contributor II
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Sorry for that. 

 

Here it is
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Altera_Forum
Honored Contributor II
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I think i have my PHY file almost completed, but I have one last problem that I can&#39;t solve. How do I determine the Physical address of my PHY? I looked on my data sheet but all i can find is data on the 5 pins that control it saying that it supports 32 address (2^5). Is there set default for all these devices, or is this an arbitrary number since I only have 1 PHY device and 1 MAC device? 

 

//edit: I found on an ST data sheet (I&#39;m using a TDK) that the register values are obtained on power on/reset by latching the address pins. Is this standard for all PHYs?  

 

 

Thanks, 

Jon
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Altera_Forum
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Hello Jon 

 

I have to work with TDK PHY.  

Can you send me TDK files?  

 

Thanks, Ilya
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Altera_Forum
Honored Contributor II
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Hello all 

 

Unfortunately I didn&#39;t find "alt_ethernet_dev.h" file and couldn&#39;t download it. 

I&#39;ll appreciate somebody&#39;s help. 

 

Thanks, Ilya
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Altera_Forum
Honored Contributor II
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you can get the alt_ethernet_dev.h from the lwIP.zip file available in the ip download section. 

 

@Nir: 

Thank you very much... i get an error because my bus width is 16, how do i get it to 32?
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Altera_Forum
Honored Contributor II
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Nir, 

 

Do you know if this driver works with uCLinux or does it already have a driver? 

 

Thanks, 

 

Wade 

 

 

--- Quote Start ---  

originally posted by nir@Jan 4 2005, 04:49 PM 

hi everyone 

 

please feel free to use these files and/or comment on them. i&#39;ve written them as a driver for the opencores mac solution. i have been using them with the lwip web server example that comes with the nios ii installation and they seems to work. 

 

i&#39;ve attached a zip file with three files in it: 

opencores_ethernet_mac_regs.h - contains the definitions of the registers inside the opencores mac component. 

opencores_ethernet_mac.c and the matching h file is the actual driver. 

 

i&#39;ve used these files in conjuction with files that come with the nios installation, which i can&#39;t post here for obvious reasons. what i did was to make a copy of the altera_avalon_lan91c111 directory, name it accordingly and replace the file in the hal\inc and hal\src as well as the regs file in the inc directory with the file i&#39;ve attached. i hope this helps someone. 

 

nir 

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--- quote end ---  

 

--- Quote End ---  

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Altera_Forum
Honored Contributor II
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Hi everyone, 

where can I download the ip core?  

Is it www.opencores.org

 

Thanks! http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/laugh.gif
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Altera_Forum
Honored Contributor II
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http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif Hello all & Nir 

Please take in mind that the S/W Auto negotiation process with the STE100 assumes that the STE100 device is Hardware configured (resistors pull-up & down). to enable auto negotiation at 100/10 Mbit full duplex (without H/W configuration) ANA and 100CTR registers should be modified before Autonegotiation restart. 

 

Thanks for everything 

We this work fine for us 

Avi
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