Anyone using OCIDEC ?

[Altera_Forum]

Have anyone tried using the Opencores IDE controller instead of the Altera CF interface ?? 

I have a custom NiosII FPGA image w/OCIDEC, and have made the necessary changes to the uClinux 2.6.9 kernel to get the ocidec driver to compile and initialize. The CF is detected at boot (see below), but the kernel hangs at the partition checking in idedisk_attach(). Here are the boot messages:  Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2 ide: Assuming 50MHz system bus speed for PIO modes; override with idebus=xx OCIDEC V3.1 hda: SanDisk SDCFB-64, ATA DISK drive hda: selected PIO mode1 (383ns) wo/IORDY (overriding vendor mode) Using anticipatory io scheduler ide0 at 0x80000940-0x80000947,0x80000978 on irq 25 hda: max request size: 128KiB hda: 125440 sectors (64 MB) w/1KiB Cache, CHS=490/8/32  hda:  Any ideas, anyone ??

[Altera_Forum]

Hi, 

 The problem is that OCIDEC does not exactly reflect the CF irq line (it has to be reset by soft). The kernel does not reset it and so waits to detect a new irq forever... Try to pass the CF irq directly to the kernel via avalon.  I added in the Avalon-Wishbone interface an output irq signal to avalon directly connected to the CF irq line:  avalon_irq_o <= intrq_pad_i;  I hope that it can helpy you...  Regards,  Thierry

[Altera_Forum]

Thanks for the info! At the moment we are using Alteras CF controller as there is no need for the flexibility that OCIDEC provides in our design. But your info might be useful in future designs. 

  Regards Atle

[Altera_Forum]

atlenisse, 

I also use OCIDEC to replace altera CF card. Although i use OCIDEC driver in uclinux but i don&#39;t see the same boot messages as yours. It will halt after "OCIDEC V3.1" message. Could you tell me whether you have to do some modifications in OCIDEC driver or only by default? I use uClinux 2.6.11 kernel .  Thanks. Sam

[Altera_Forum]

--- Quote Start ---  originally posted by samlittle@May 3 2006, 11:21 PM atlenisse,       i also use ocidec to replace altera cf card. although i use ocidec driver in uclinux but i don&#39;t see the same boot messages as yours. it will halt after "ocidec v3.1" message. could you tell me whether you have to do some modifications in ocidec driver or only by default? i use uclinux 2.6.11 kernel .  thanks. sam <div align='right'><{post_snapback}> (index.php?act=findpost&pid=15009)  --- quote end ---    --- Quote End ---   I have tested the altcf core with IDE harddisk on many custom boards. It is straight forward. If you want faster io timing, just edit the ptf. Why do you want to use ocidec ? I didn&#39;t see any advantages.  Please note it takes time to copy buffer by CPU, and it is very slow. You should use mmap() to improve performance.

[Altera_Forum]

Hi Hippo, 

Thanks for your answer. I use OCIDEC because altera only guarantees altcf core that support PIO mode 0. So, i want to make my design more flexible. In your reply, you say only need to modify ptf how can i do it? Moreover, i ever monitored altcf timing in signaltap II at 50Mhz of nios2 system clk, its result only meet PIO mode 0 timing(600nsec). So, it maybe don&#39;t reach more higher mode unless i maybe increase system clk.  Regards, Sam

[Altera_Forum]

--- Quote Start ---  originally posted by samlittle@May 5 2006, 11:24 PM hi hippo,  thanks for your answer. i use ocidec because altera only guarantees altcf core that support pio mode 0.  so, i want to make my design more flexible. in your reply,  you say only need to modify ptf how can i do it?  moreover, i ever monitored altcf timing in signaltap ii at 50mhz of nios2 system clk, its result only meet pio mode 0 timing(600nsec). so, it maybe don&#39;t reach more higher mode unless i maybe increase system clk.  regards, sam <div align='right'><{post_snapback}> (index.php?act=findpost&pid=15086)  --- quote end ---    --- Quote End ---   SLAVE ide  {  SYSTEM_BUILDER_INFO   {  Bus_Type = "avalon";  Address_Alignment = "native";  Address_Width = "4";  Data_Width = "16";  Has_IRQ = "1";  Read_Wait_States = "530ns";  Write_Wait_States = "500ns";  Setup_Time = "70ns";  Hold_Time = "30ns";  Edit these wait timing in your ptf, then regenerate in sopc builder.

[Altera_Forum]

--- Quote Start ---  originally posted by hippo@May 4 2006, 11:22 AM i have tested the altcf core with ide harddisk on many custom boards.  --- Quote End ---    hippo, how did you get the altcf core working with the IDE hard disks?  I have a ep1s10 dev kit and when I boot up linux with an IDE drive plugged into the J11 connector it just says:  Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2 ide: Assuming 50MHz system bus speed for PIO modes; override with idebus=xx CF: ctl=0

[Altera_Forum]

--- Quote Start ---  originally posted by lukequinane+jun 14 2006, 02:55 pm--><div class='quotetop'>quote (lukequinane @ jun 14 2006, 02:55 pm)</div>  --- quote start ---  <!--quotebegin-hippo@May 4 2006, 11:22 AM i have tested the altcf core with ide harddisk on many custom boards.  --- Quote End ---    hippo, how did you get the altcf core working with the IDE hard disks?  I have a ep1s10 dev kit and when I boot up linux with an IDE drive plugged into the J11 connector it just says:  Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2 ide: Assuming 50MHz system bus speed for PIO modes; override with idebus=xx CF: ctl=0 <div align='right'><{post_snapback}> (index.php?act=findpost&pid=16167)</div> [/b]  --- Quote End ---   The cf example use cf socket, not ide header. Did you add the altcf component in sopc builder and assign the pins to regenerate sof?