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Hi,
from NiosII manuals i read about data organization of processor is little endian mode, so in memory area i'm expecting the LSbyte of a word on memory location es. "X" and MSbyte on X+3, is this correct ? I'm troubling with modelsim and system simulation with flash(16 bit wide) with code, i'm not sure how to make the flash data file of flash model. Seem that the first code to be executed will be 3A700100 7400C004 etc. (from IDE flash file), when the nios load the code from flash interface start with flash base address and after flash base address + 2, so on first cycle load a 703a and on second cyle 0001, it seem correct , it's true ? robyLink Copied
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