Nios II seems to be lacking an MMU http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/sad.gif
Is anyone aware of a suitable block of logic commercial or otherwise that could take its place - to scetch out the principle, add an mmu (of sorts) to the avalon bus between nios and the memory device(s) and some control interface which could be set up to use custom instructions.. this would allow for paging and/or domain management, limited of course, and possibly costly in performance.
This is of interest to me since high integrity operating systems are not available for nios so true memory partitions cannot be applied.
Please feel free to point out the holes in this, make me aware of developments that may make any develpment effort at my end redundant or express an interest in the principle.
As I understand it MMUs are costly in terms of current load (in asics at least) this may be why altera ommited the mmu (anyone know any better?) but this MUST have been problematic for people porting linux onto NIOS so if anyone has a better idea of how to get one in there - allbeit an extension I would be keen to hear it.
Also on another vain I gather arm may go soft - arm7tdmi to be precise on 'anothers' technology is there any hope of seeing a true arm in an cyclone/stratix ?
