PIO Vs. Avalon ?!

[Altera_Forum]

hi....i&#39;m using a niosII processor and I wanna add a hardware block external to the processor and on the same FPGA that performs a general function (eg, Vector dot product). Should I interface it to the processor using the avalon bus or can i interface to a PIO block that&#39;s already interfaced to the avalon bus? http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/unsure.gif  

thnx

[Altera_Forum]

Hi wesam, 

 > Should I interface it to the processor using the avalon bus or can i > interface to a PIO block that&#39;s already interfaced to the avalon bus?  I started a design using a PIO for address, a PIO for control, and a PIO for data. I quickly changed my mind once I started writing the device driver code -- it was much more time-efficient (and MIPS efficient) to just write a simple avalon interface. Later, I decided I needed DMA support ... and it basically came "for free" since I already had the avalon interface.  In general, if you&#39;re doing more than just twiddling a few bits, you should consider the avalon interface. One way or another, you&#39;ll end up writing the interface logic anyway-- whether it&#39;s in an HDL or in C ... but the HDL strategy comes with some built-in "freebies" ;-)  Regards, --Scott

[Altera_Forum]

thnx a lot, 

so, are the &#39;Create New Component&#39; and the &#39;Interface to User Logic&#39; in SOPC implement an avalon interfaced device or just any general device? thnx

[Altera_Forum]

The interface to user logic will create the avalon interface for your logic. 

You&#39;ll have to select address width, data bus width, etc. as appropriate.  Regards, --Scott

[Altera_Forum]

I should be more clear ... sorry: 

 > The interface to user logic will create the avalon interface for your logic.  The interface to user logic will export the avalon bus signals from the system module that your custom logic connects to.  --Scott

[Altera_Forum]

thanks a lot