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PIO port width information is missing

Altera_Forum
Honored Contributor II
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I would like to suggest the inclusion of the PIO port width in system.h in future releases 

 

Background: 

A PIO port's description in system.h has the following form: 

<div class='quotetop'>QUOTE </div> 

--- Quote Start ---  

#define CP2_GALVOSTRT_NAME "/dev/cp2_galvoStrt"# define CP2_GALVOSTRT_TYPE "altera_avalon_pio"# define CP2_GALVOSTRT_BASE 0x00A00950# define CP2_GALVOSTRT_DO_TEST_BENCH_WIRING 0# define CP2_GALVOSTRT_DRIVEN_SIM_VALUE 0x0000# define CP2_GALVOSTRT_HAS_TRI 1# define CP2_GALVOSTRT_HAS_OUT 0# define CP2_GALVOSTRT_HAS_IN 0# define CP2_GALVOSTRT_CAPTURE 0# define CP2_GALVOSTRT_EDGE_TYPE "NONE"# define CP2_GALVOSTRT_IRQ_TYPE "NONE"# define CP2_GALVOSTRT_FREQ 60000000[/b] 

--- Quote End ---  

 

 

Some of this is useful from the software point of view, a big part of it is not.  

Unfortunately the width of the port is not specified, although this is a very important parameter when writing generic code which adapts automatically to the hardware. 

 

For instance handling of overflow and signed numbers to and from a PIO port requires knowledge of the port width in order to work. As it is now, this information has to be brought "manually"/"mentally" over from the sopc builder into the NIOS project. A procedure which is error prone. 

 

What do you think of that suggestion, or have I overlooked a method for achieving this otherways? 

 

regards
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Altera_Forum
Honored Contributor II
263 Views

Not much reaction to this! Trying to reschedule a bit.... 

 

Arent there anyone else who thinks this could be a useful improvement to SOPC/NIOS II?
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Altera_Forum
Honored Contributor II
263 Views

Hi Larsen, 

 

I agree, this sounds like a fine enhancement. Sorry I did not see this earlier. I will file an enhanement request for our engineering staff to consider it!
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