Yes they will have to share that tristate bridge so that they will be talking to the flash connected to it. If both processors will but using the exact same application then you can point them both to the same reset address in flash, otherwise you'll have to program the algorithms in two locations and have each CPU reset to the correct location. I forget if flash programming was covered in the multiprocessor document up on the Altera page under the Nios II literature but it's worth taking a look just to see various different multiprocessor designs.
