Hello:
I've got a cyclone device with a NIOS II processor. It is using a interface to user locig that is tied to an SRAM device.
The SRAM is 3.3 volts.
I'm seeing strange behavior on two (and only two) of the memory address lines MA18 and MA20.
Specifically CS\ to the SRAM goes low (and I have it low for 150 nsecs) and the MA18 and MA20 should be low but go to 1.5 volts for part of the CS\ period. Not a noise or ground bounce situation but looks like these signals go to 1.5 volts at some multiple of the clock period (40 MHz).
These output puns are programmed as LVTTL. All other address and data pins are OK. I've built several other systems using the same design with no problems.
Some other testing we've done. I wired the address pins to ground. Same problem.
I've wired MA18/19/20 to a clock 200/400/800 msec. I could see perfect clock periods in a static condition. But when I tried to load code (using JTAG) some of the CS\ events had 1.5 volt levels.
I lifted these pins from the PCB. Same problems.. I've removed the SRAM and the FLASH the only devices that connect to the address pins. Same problem...
I'm ising an EP1C6T144C7. The pins in question are 33 and 34 which are at the end of Bank 0.
I'm using a 3.3 to 1.5 regulator LP3881ES. Because the signals appear for soo long and I don't see overshoot or ringing I don't think it's a noise issue.
Has any one seen this and/or what's my next step.
Thanks
George
