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Debug problem, need help!

Altera_Forum
Honored Contributor II
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I had buid a small system in SOPC Builder 5.0 with NIOS II/F, JTAG level 3, 8KBytes onchip_rom, 4KBytes onchip_ram, jtag_uart, and a output only PIO module.  

 

In NIOS IDE, I compiled a sample project hello_world_simple, this project could run properly on target hardware, how ever, if I debug this project, the gdb-server-console will report a time out message after listening for target's response for 1 minute. 

 

I'm using stratix ep1s20c7, with 50 MHz clock and Byteblaster II.
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Altera_Forum
Honored Contributor II
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The Byteblaster II cable is not supported for debug. That being said, it should still work, but you've got to make sure your JTAG chain is very clean.... Try running SignalTap II on your Quartus II design. If it fails with some sort of JTAG communications error, you've got signal integrity issues. 

 

In any case, you ought to get a better solution for d/l and debug. I'd recommend a USB Blaster, or, if you can't afford one, try the EZNIOSUSB from EasyFPGA. 

 

Cheers, 

 

- slacker
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Altera_Forum
Honored Contributor II
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Hi Slacker, 

 

I'll try running SignalTap II next Monday. Thanks for your advice. 

 

BTW, my board is customized and application specific, and it's physical/electronic interface is not compatible with any of Altera official NIOS dev-board, so I think the EZNIOSUSB daughter can't mount on my own board.
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Altera_Forum
Honored Contributor II
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Hi Slacker, 

 

I'll try running SignalTap II next Monday. Thanks for your advice. 

 

BTW, my board is customized and application specific, and it's physical/electronic interface is not compatible with any of Altera official NIOS dev-board, so I think the EZNIOSUSB daughter can't mount on my own board.
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Altera_Forum
Honored Contributor II
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If you have a JTAG header, the EZNIOSUSB can be used very much like the USB Blaster. When operating in this mode, it is powered by the USB connection and not connected to the "Santa Cruz" header. 

 

Again, that's "if" you have a JTAG header on your board. 

 

Cheers, 

 

- slacker
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Altera_Forum
Honored Contributor II
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Yes, I have a standard 10 pin JTAG heard in the board, which connects EP1S20 and EPC8 in JTAG chain mode. 

 

Your said the EZNIOSUSB can be used very much like the USB Blaster, do you mean that the EZNIOSUSB has most all the USB Blaster's key function? 

 

BTW, I'm working in China, dose EasyFPGA have any distributor located in China mainland? Thanks.
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Altera_Forum
Honored Contributor II
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<div class='quotetop'>QUOTE </div> 

--- Quote Start ---  

Your said the EZNIOSUSB can be used very much like the USB Blaster, do you mean that the EZNIOSUSB has most all the USB Blaster&#39;s key function?[/b] 

--- Quote End ---  

 

 

That&#39;s what the specs. on the product say. I&#39;ve ordered one, myself, so I&#39;ll let you know, once I get it. 

 

<div class='quotetop'>QUOTE </div> 

--- Quote Start ---  

BTW, I&#39;m working in China, dose EasyFPGA have any distributor located in China mainland? Thanks.[/b] 

--- Quote End ---  

 

 

I don&#39;t know. You could try contacting them to ask them this question, though, in my experience, they&#39;re not very responsive. 

 

Sorry I couldn&#39;t be of more help. 

 

Best of luck, 

 

- slacker
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Altera_Forum
Honored Contributor II
360 Views

Thanks very much for your help!

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Altera_Forum
Honored Contributor II
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The problem was solved last week. The reason is that NIOS IDE V5.0 may be not compatible with my os Window Server 2003. When I moved this evioroment to Windows XP Professional, it works well http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif .

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