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I have build a NiosII hardware system. I have make sure it works well on my board. Today I reopened it in SOPC Builder, added an extra PIO component, regenerated the niosII cpu , update it in my .bdf file. However, a strange error existed during the Analysis&Synthesis prosess.
Error: Can't open encrypted VHDL or Verilog HDL file "D:/dev1/cpu_0.v" -- current license file does not contain a valid license for encrypted file Error: Node instance "the_cpu_0" instantiates undefined entity "cpu_0" Error: Quartus II Analysis & Synthesis was unsuccessful. 2 errors, 190 warnings Error: Processing ended: Thu May 11 11:54:22 2006 Error: Elapsed time: 00:00:05 I have never seen these errors before. My design has been working well on my board all the time. Why such problem takes place when I re-edited and update the design? Please help me! Thanks for all.Link Copied
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--- Quote Start --- originally posted by mxy_1984@May 11 2006, 05:59 AM error: -- current license file does not contain a valid license for encrypted file
<div align='right'><{post_snapback}> (index.php?act=findpost&pid=15277)
--- quote end ---
--- Quote End --- Did your license time out? Or maybe the setup for the license file got messed up?
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--- Quote Start --- originally posted by kalle leo+may 11 2006, 04:04 pm--><div class='quotetop'>quote (kalle leo @ may 11 2006, 04:04 pm)</div>
--- quote start ---
<!--quotebegin-mxy_1984@May 11 2006, 05:59 AM
error: -- current license file does not contain a valid license for encrypted file
<div align='right'><{post_snapback}> (index.php?act=findpost&pid=15277)
--- quote end ---
--- Quote End --- Did your license time out? Or maybe the setup for the license file got messed up? <div align='right'><{post_snapback}> (index.php?act=findpost&pid=15284)</div> [/b] --- Quote End --- Thanks for Kalle Leo. I have resoved the problem. After I re-installed my licence,the mistake did not occur any all. Now my design works well again. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif
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