need help about cfi on board

[Altera_Forum]

i designed a board myself with a cfi flash of 2M(add 19 data 16), fpga is cyc2c35. i set it at the word mode and pins are correctly connected to the fpga. in the sopc builder, i imported the netlist of my pcb. but when generating the system, it always stops at the cfi module even if the system has only cpu and cfi with an avalon the message is shown as follows: 

# 2006.06.02 17:38:27 (*) Starting generation for system: mk.# 2006.06.02 17:38:30 (*) Running Generator Program for cpu_0# 2006.06.02 17:38:37 (*) Checking for plaintext license.# 2006.06.02 17:38:51 (*) Plaintext license not found.# 2006.06.02 17:38:51 (*) Checking for encrypted license (non-evaluation).# 2006.06.02 17:38:53 (*) Encrypted license found. SOF will not be time-limited.# 2006.06.02 17:39:44 (*) Creating encrypted HDL# 2006.06.02 17:39:58 (*) Running Generator Program for cfi_flash_0 ERROR: d:/altera/kits/nios2_51/components/altera_avalon_cfi_flash/cfi_flash.pl 321 CALLED (generator_program)  d:/altera/kits/nios2_51/components/altera_avalon_cfi_flash/cfi_flash.pl 273 CALLED (e_project::do_makefile_target_ptf_assignments) WHERE 'Can't parse class ptf 'D:/GRADUATE/mk/board1/'' OCCURRED on c:/altera/quartus51/sopc_builder/bin/europa/e_project.pm 4516   Error: Generator program   for module 'cfi_flash_0' did NOT run successfully.  i do not know why and ask for your help, thanks a lot.

[Altera_Forum]

Maybe you should try first without imported PCB netlist. 

 You should post this question on General discussion board. Not here!

[Altera_Forum]

Sorry to post this here, cause my aim is to run a uclinux on board. I started without the pcb netlist first, it can process and generate the system, but in that way, flash cannot be tested by the memtest.c from niosII examples and i cannot use the flash programmer.  

 please be patient with my words cause i am really very eager for your help.  i am trying to do something with the problem as follows:  1)i created a board of cyclone2c35(the develop board model provided in the SOPC builer) and compile it. pass.  2)in the board description part, i changed it to my own nelist and definition of flash etc. in the last step of board description, i changed the board name to a new one. and click finish.  3)Back to the SOPC builder, i selected the board i just defined. in this way, all the components can be complied correctly.   with this system, when running the NIOSII IDE for programs, only the helloled.c can be excuted correctly(i can see the leds changing), but the helloworld, memtest do not have feed backs after being downloaded in the cpu.  is it possible that the problem is in the ptf file? or whether can i run a uclinux without the netlist?   thang you very much again.

[Altera_Forum]

It sounds like pin assignment problem. 

You should check your quartus compiled pin out file, .pin , with your netlist. And make sure you have the correct pin out.  I use simple perl script to generate pin assignment / contrain for fpga , and netlist for PCB layout. I never use the netlist approach in sopc builder. You can use pin planner in quartus to place the pins manually. Or you may try Quartus II 6.0 and Nios II 6.0, which may have better result with PCB netlist.  You must have helloworld and memtest passed, to verify your board is working fine. You must be able to load and run program from sdram.