Fundamental difference with certain Avalon Signals

[Altera_Forum]

Does anyone know what is the fundamental difference between the "chipselect" signal and the "begintransfer" signal? 

 To me it looks very similar, however I cannot seem to find any characteristic differences as in the timing of each signal.  Thanks

[Altera_Forum]

Read this document 

 http://www.altera.com/literature/manual/mnl_avalon_spec.pdf (http://www.altera.com/literature/manual/mnl_avalon_spec.pdf)   But to answer your question ... Chipselect is enabled any time that the avalon bus is actively talking to your component (or from your component if it's a master). Begintransfer is only active at the beginning of a transfer. You would likely only use this if your custom user logic allowed burst transfers which it probably does not. Also, I don't even know if the instruction and data master ports on the NIOS processor support this signal. However, the DMA module does.