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Hi all.
I was wondering if its possible to issue a chip erase command (or writes for that matter) through a state-machine driven custom Avalon Switched Fabric Master Bus? I have a microcontroller acting as my bus master through a custom bus interface (EMIF) and was hoping to plop down a single Common Flash Interface (CFI) core onto the Switched Fabric to simplify programming. However, now that I'm actually trying to build it, I'm not so sure its possible. The CFI componan'ts data sheet states the following <div class='quotetop'>QUOTE </div> --- Quote Start --- In general, any Avalon master in the system can read the flash chip directly as a memory device. For Nios II processor users, Altera provides HAL system library drivers that enable you to erase and write the flash memory using the HAL API functions.[/b] --- Quote End --- Now that doesn't specifically say it isn't possible. I've tried writting the op codes necessary to erase the chip with no luck at all. Does anyone have any experience doing anything similar. My alternative is to put on a Nios core and embed the software into on-chip-memory, which would of course include all of the state machines necessary. However, my technical lead is against this idea, for reasons beyond me. Anyone have any suggestions? Regards, KevinLink Copied
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For the record, it is very much possible. If one does this, you just need to pay very close attention to endian of your devices as well as going between master and slaves of different data widths. The SOPC builder likes to play with your address values which reaks havok when you're trying to send write commands to specific Flash addresses.
Kevin
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