NIOS II KILLER

[Altera_Forum]

A NIOS II killer is born. Codename Mico32 from Lattice. 

 Seems that soft proc gained a lot of interest for all FPGA vendors. ARM7 for Actel, MicroBlaze for Xilinx and of course our great NIOS2.  Hey Altera guys what do you think of that ? http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/biggrin.gif   Note that I&#39;m not endorsed in anyway with Lattice. It&#39;s only that I really **LOVE** soft proc concept and try to be aware of anything about that.  Cheers.

[Altera_Forum]

If you like it, implement it on an Altera part http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif  

It is, after all, open source. I just got a little glimpse of the tool-set for the Mico32, it is quite similar to the NIOS2 tool-set. They also use the eclipse environment (so does Microblaze for that matter). One interesting thing, the Mico32 offers 1-way or 2-way cache for d$ and/or i$.  By the way, I am not, in any way, a part of Altera, or actually endorsing the Mico32--just making observations.

[Altera_Forum]

It seems that the Mico32 is rather large and slow compared to a Nios II. 

 Here&#39;s the stats from the Lattice web site:  Performance and Resource Utilization for LatticeECP2/M Devices1:  Configuration LUTs fMAX (MHz) Basic 1,571 98 Standard 1,816 116 Full 2,158 116  Three Configurations:   * Basic  o No Multiplier  o Multicycle Shifter  o No Cache  * Standard  o Multiplier  o Pipelined Shifter  o 8K I-Cache, No D-Cache  * Full  o Multiplier  o Pipelined Shifter  o 8K I-Cache, 8K D-Cache  Their "Standard" version is about the size of a Nios II/f but the Nios II/f includes a data cache.  The frequency of all cores is substantially slower than any of the Nios II cores. Maybe that is a property of the Lattice FPGAs? It would be interesting to get an apples to apples comparison to Nios II by implementing a Mico32 on an Altera device.