Hi Everybody,
I am a biginnet to NIOS in Altera FPGA's.
Our customer has given us some existing code and asked us use the same for present project. This FPGA functionality is some thing to work as a bridge between SPI and I2C interfaces. Processor to FPGA interface is on SPI and FPGA to on-board devices interface is on I2C. So, FPGA has to lookinto SPI command and has to initiate corresponding I2C signal generation from NIOS Core. To support timing requirements of SPI interface.. one DPRAM is used to replicate some of on-board device information.. In read condition, data can read from DPRAM instead of following interface conversion. For some other devices, data has to be read through NIOS and sent to FPGA Logic. Finally, This particular FPGA code which is taking care of Avalon interface, needs to 2 read data interfaces.. One from NIOS core and other from DPRAM. But when i tried to create a component with this FPGA code and declare these 2 signals as writedata avalon interfaces in SOPC Builder, It is giving a error saying "There can be only one signal of type writedata".. Please help me on how to declare these two signals.. Since these 2 signals are inputs to FPGA code i am expecting these two signals as writedata only.
Thanks & Regards,
Siva
