Verify failed problem!

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Welcome To Altera SOPC Builder  Version 6.0, Built Mon Apr 24 15:26:45 PDT 2006 ------------------------------------------------  ------------------------------------------------ Welcome to the Nios II Embedded Design Suite Version 6.0, Built Fri Apr 21 04:12:54 PDT 2006 hi,everybody  I used DE2_NET project and running on DE2 Board , anything is ok. but when i building a new nios.ptf and running on DE2 Board. It's has following problem.  Anyone known how to slave this problem.  Need your help!  NiosQ  Example designs can be found in  /cygdrive/c/altera/kits/nios2_60/examples  ------------------------------------------------ (You may add a startup script: c:/altera/kits/nios2_60/user.bashrc) /cygdrive/c/altera/kits/nios2_60/examples [SOPC Builder]$ cd c: /cygdrive/c [SOPC Builder]$ nios2-download -g zImage Using cable "USB-Blaster [USB-0]", device 1, instance 0x00 Pausing target processor: OK Initializing CPU cache (if present) OK Downloaded 1251KB in 15.9s (78.6KB/s) Verifying 00500000 ( 0%) Verify failed between address 0x500000 and 0x502A2D Leaving target processor paused /cygdrive/c [SOPC Builder]$

[Altera_Forum]

The later DE2 support disc v1.3-v1.5 have problem in sof, and will cause jtag download error. 

Please use v1.1 attached in the wiki, http://nioswiki.jot.com/wikihome/operating...e2_net_v1.1.zip (http://nioswiki.jot.com/wikihome/operatingsystems/%c2%b5clinux/tryoutuclinux/de2_net_v1.1.zip)  On the DE2 support disc v1.1 nios_0.ptf, sdram base at 0x00000000. The later v1.3-v1.5 system_0.ptf have sdram base at 0x00800000 and strange sof, and will cause jtag download verify error. If you recompile v1.3-v1.5, you will need to do hwselect again.