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Hi all
Whats the easiest way to make sure Quartus II put flops in IOElement ? Example, line would be very helpful. I would rather not use "pragmars" in the source code (Verilog). Also I seems to remember only a certain type of flops (i.e. either sync/async reset/set) can be put into IOE ? Advice on that will also be appreciated. Example pin assignment file would be very useful for me as well. Thanks everyone.Link Copied
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--- Quote Start --- Hi all Whats the easiest way to make sure Quartus II put flops in IOElement ? Example, line would be very helpful. I would rather not use "pragmars" in the source code (Verilog). Also I seems to remember only a certain type of flops (i.e. either sync/async reset/set) can be put into IOE ? Advice on that will also be appreciated. Example pin assignment file would be very useful for me as well. Thanks everyone. --- Quote End --- Hi, first of all you have to define FF's for your input and output signals. In the assignment editor you can specify "Fast Input Register" and "Fast Output Register" for the Input and outputs. Kind regards GPK
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