Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

MAX3488 with CII

Altera_Forum
Honored Contributor II
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Hi there! 

We use MAX3488 (3.3V RS-485 Tranceiver by MAXIM's) and CII EP2C20Q240. 

http://foto.mail.ru/mail/jens_moksin/_myphoto/4.html http://www.alteraforum.com/forum/rx.bmp%20-%202.2%20mb (http://oron.com/otm1h7wusf2x/rx.bmp.html)  

So, the problem is: 

it seems that CII doesn't work properly with some MAX's. Often we see that RX doesn's stay in log."1" in idle. The RX pin of EP2C20 is input 3.3V CMOS current 24mA (we also tried 12mA and Minimum Current). Can CII's pin do harm for RX MAX's pin? And why so if the answer is "yes"? Maybe we should place the series resisitor in RX-CII <--> RX-MAX net?  

P.S. It's very interesting but unconnected RX pin of MAX shows something like signal of TX connected pin, with the absence of signal on A-B (receiver net RS-485) :confused: !!!!!! Have you ever met such problem?  

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Altera_Forum
Honored Contributor II
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Your report doesn't sound reasonable. MAX3488 has a standard LVTTL interface specification and can be expected to work with any logic device with VCC of 3.3V. I assume, that standard signal wiring rules for digital logic are kept. This includes the usage of series termination resistors for longer PCB traces, sufficient ground connection and bypassing. 

 

On the RS422 receiver side, you won't get a stable idle level on the receiver without biasing resistors. That's a RS422/RS485 standard problem and not particularly related to FPGA.
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