SOPC: Adding component

Altera_Forum · ‎10-14-2009

Hi. I am new in SOPC.

Background:

i am trying to compare the speed of encryption and decryption of text string designed by software and hardware.

There are a few questions i would like to ask:

1. How to configure the signal type in adding a new component? is there any good reference i can refer to about the signal types? Although I downloaded the qts_qii5v4.pdf, there is no info abt the signal types.

2. Do i need the write .h(encryption and decryption written in verilog) file to include in NIOS II IDE?

3. How can I control the data(entered by user) to be feed in to software or hardware?

4. Is there any good and simple example on control the added hardware(s)?

5. i use the Quartus II 9.0sp2. When i install the nios II ide 9.0 service pack 2, i get the message that version of Quartus II does not match the version of nios II ide. any idea on it? May i know any consequences if i ignore the message?

I am sorry if i ask silly question.

Thanks a lot

Altera_Forum · ‎10-14-2009

Hi,

I am a newbie too, but I am wondering what you want to do:

*compare software (thus with a Nios processor) encryption/decryption with a full hardware system written in verilog

OR

*compare software with software+C2H (hardware acceleration) which is an automatic verilog file generated from some C code functions.

By the way, SOPC allows you to build a system on chip, by adding a Nios processor, some memory, etc.

If you want to write your own hardware blocs, Quartus provides you the right environment. You can mix the two by creating a part of your system with SOPC and the rest in Quartus by adding some custom verilog written blocks.

Nios IDE allows you to program the Nios processor you added in SOPC, and actually you can "convert" some C code into hardware blocks with C2H, but you don't have to go back in quartus.

About the inputs, add a JTAG_UART component in SOPC, and use STDIN in your C code. You will be able to enter your text string through the terminal. But there is certainly other solutions...

I hope it will help you,

Sacha

Altera_Forum · ‎10-14-2009

Hi Sacha,

Actually i design a hardware written in verilog and software written in c++ code of encryption and decryption(e&c). However, i have no idea how to put it all together. e.g. How can i let the input(from console) go to hardware instead of software or vice versa? or pass the output(result) to be display

Regarding the signal, i think that u misunderstand my words. In sopc, when you click to add a new component, there is a signal tab that list out the input and output port of ur design(verilog or vhdl). I don't understand on the type of signal to be selected for input and output of my design.

Altera_Forum · ‎10-14-2009

I never tried this, but maybe in your software you could redirect your entered string to a PIO component (see IOWR), an choose the number of bits. Then in Quartus you will see thoses wires and you could use it to plug with your own hardware blocks...

Altera_Forum · ‎10-14-2009

The signal types that you need to have for your components are Avalon interfaces. Probably an Avalon memory mapped slave.

Then you can access the registers in your hardware component from the software through IORD/IOWR macro calls.