Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20687 Discussions

After jtag download success,CONF_DOEN pin is low!!

Altera_Forum
Honored Contributor II
1,684 Views

Hi everybody! 

My new board doesn't work! 

After jtag download success,CONF_DOEN pin is low and nCONFIG pin is high! 

Is there somebody know about it! 

Please help me ! 

Thank you!:confused:
0 Kudos
6 Replies
Altera_Forum
Honored Contributor II
374 Views

Does conf_done go high for a while (some µs) or is it always down at the end of the programming? 

Maybe your board has not enough power to drive the design in the FPGA? Look at the core voltage (1.2V) and vccd_pll voltage. Is there a fall at the end of the programming? 

 

Maybe it isn't a voltage issue but I had once a similar problem...
0 Kudos
Altera_Forum
Honored Contributor II
374 Views

COF_DOEN is always low!

0 Kudos
Altera_Forum
Honored Contributor II
374 Views

And the power is 1.2 and 3.3 after programming! 

There is no fall at the end of the programming!
0 Kudos
Altera_Forum
Honored Contributor II
374 Views

OK! It works!

0 Kudos
Altera_Forum
Honored Contributor II
374 Views

what was the problem?

0 Kudos
Altera_Forum
Honored Contributor II
374 Views

nCS did not pull down!

0 Kudos
Reply