Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20693 Discussions

Stratix III issue

Altera_Forum
Honored Contributor II
1,035 Views

hello! 

i'm using STRATIX iii and I read in the handbook that the VCCclkin need 2.5v POWER.. can I use 3.3v clock generator to stratix iii in my design?
0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
231 Views

I believe the VCCclkin is for powering the differential clock input buffers (for say LVDS input clocks). You can certainly connect a 3.3V clock to the Stratix III. Obviously the recommendation would be that the VCCIO for that I/O bank be 3.3V. 

 

Jake
0 Kudos
Reply