NIOS II byte enables?

[Altera_Forum]

I have a nios II system and some custom slaves. I understand that the Nios II address space is mapped to 32 bit wide registers. When I make readdata or writedata in my slaves 8 or 16 bits the CPU executes 4 or 2 writes and increments the original address when doing subsequent writes. I have read throught the documentation and undrestand that this is normal.  

 Is there a way to make the CPU only write once to an 8 or 16 bit register? Will byte enables help? My fix at the moment is make all read and write data lines in my slaves 32 bits. But for something like a uart, they really only need to be 8 bits. Please advise.:confused:

[Altera_Forum]

have a look at these IORD_8DIRECT or IOWR.... with 8 16 or 32 bit commands 

if you use these instead of memory pointers with a 8 bit slave for example then only 8 or 16 bit are written and not 32 bit ....

[Altera_Forum]

but unfortunately with a read they execute 4 accesses to an 8 bit slave :-(

[Altera_Forum]

what does a byte enable do in this case? Does it mask the data and write 0's to the masked bytes? Or do the disabled bytes go untouched?

[Altera_Forum]

from what i have monitored with signaltap, they indicate which byte is realy valid. 

for example if your slave is 8 bit wide and is attached as a memory so a 32bit from nios side is 4 accesses to your slave  if your application reads the lower 16bit then byteenable[] indicate with 0x3 that the lower 2 bytes are requested. the avalon switchfabric will read the full 4 bytes. you can add a logic between avalon and your slave that monitors which bytes are realy requested and discrads the other to get rid of these unneeded reads.  the byteenable to not mask anything they just indicated which and how many bytes of the actuall 32 databits are valid / requested.  so they are only some kind of informational. it's up to you to use them

[Altera_Forum]

thanks MSchmitt, I guess I just have to keep on doing what I'm doing and making my data lines 32 bits and discard the extra data.