Unable to use design security feature（SIII）

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

Unable to use design security feature（SIII）

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I am facing a question. the key(.ekp) has been download to StratixIII(if I download it again, the QuartusII will popup an error and tell me the key cannot be download again) by ethernetblaster. the encrypted .pof has been programmed to an EPCs64. But when I power the board, it cannot config the FPGA.

BTW: the unencrypted pof file in the EPCs64 can config FPGA successfully.

Would you be able to explain more about this,anyone who has come across this before?

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