Hi all,
I am facing some problems with an EP3SL200F1517C4 and a Micron MT8HTF12864HDY-667DDR2 SODIMM (almost the same is shipped with the arriaIIGX_2agx125es_fpga evaluation board) accessing it through NIOS. So I decided to create a simple project with the example driver and Signal Tap II, once run the analysis I see that the
pnf is never asserted and the
ctl_cal_success and
ctl_init_success are always "high". The
pnf_per_byte is almost always FFFFFFFFh but sometimes changes (I think this causes the test to fail). As you can see in the first attached screenshot sometimes it reads just one byte from the whole word and sometimes reads the right data (second attached screenshot). When it just reads back just one byte is because of only one
byte_enable is asserted, but I don´t know if this is normal in the this kind of test. Does anyboody know what is causing the test to fail? Anybody has experience in debugging DDR2 with Signal Tap II and example driver?
Any help would be very appreciated.
Thanks in advance,
Regards.
PD: I am compiling with Quartus 9.0 sp2.
