If my design has multiple avalon buses

[Altera_Forum]

I have a design which has 4 nios cores, a sdram and several my own modules. My own modules are considered as avalon slave attached to different nios cores. The sdram is shared by all nios cores. I just use the niosII_stratixII_2s60 standard project as the template to add other modules. 

 The partial figure of SOPC has also been attached. I have a question that "Does different avalon slaves attach to different nios cores mean that they use different avalon buses?"   Can anybody help me to analyze that whether my design has multiple avalon buses or only one avalon bus?   Thanks!

[Altera_Forum]

The interconnect fabric will create independent communication channels between each master and each slave. On your system, each core is connected individually to a slave interface on your module, and you can see it as 4 independent buses (plus an additional bus to the sdram, shared between the cores). In other words the 4 cores can access your component at the same time.

[Altera_Forum]

--- Quote Start ---  The interconnect fabric will create independent communication channels between each master and each slave. On your system, each core is connected individually to a slave interface on your module, and you can see it as 4 independent buses (plus an additional bus to the sdram, shared between the cores). In other words the 4 cores can access your component at the same time.  --- Quote End ---     Thanks for your reply!