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Maximum power dissipation

Altera_Forum
Honored Contributor II
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Hello, 

 

I am designing a Cyclone III EP3C25 and/or EP3C40 prototyping board. Since the main purpose is for design development, I would like to remain as flexible in the power requirements as possible. 

 

Thus, in order to design the power supply for the board, I need to know what the maximum power consumption/dissipation for the device is, but this information is surprisingly hard to find! It would have been nice to see this information in the data sheets, but it is not there. 

 

I did find "dspkg.pdf" which lists the various thermal characteristics for the various packages, however, it was not clear how to use this information in my application. 

 

Any clues about how I can easily find or calculate the maximum power consumption/dissipation that a chip can handle?  

 

To start, I have done some preliminary calculations using the data in dspkg.pdf: 

 

e.g. if the maximum junction temperature is 125 degrees C, and the maximum ambient temperature is 80 degrees C, and the thermal resistance is around 27 in still air, then I figure the maximum power dissipation is about 1.6W, but this seems very low! I would not be able to use even 1/10th of the resources of the chip! 

 

From the power play estimation tools, I can see that a typical Nios implementation would need at least twice that amount of power. 

 

Is there something that I am missing? Are these components really limited to 1.6W? 

 

Thank you for your help. 

 

Dave Rector 

*:^)
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Altera_Forum
Honored Contributor II
944 Views

 

--- Quote Start ---  

the maximum ambient temperature is 80 degrees C 

--- Quote End ---  

If so, you may want some more effective cooling than placing the part in still air... 

 

 

--- Quote Start ---  

Are these components really limited to 1.6W? 

--- Quote End ---  

No, see above. 

 

 

--- Quote Start ---  

I would not be able to use even 1/10th of the resources of the chip! 

--- Quote End ---  

How did you calculate the power demand in this case? 

 

I know, that you are able to create a design with unusual high average register toggle rate. But I never saw such a design in practice. I mostly over-estimated core power consumption of real designs.
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Altera_Forum
Honored Contributor II
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Thank you for your quick response! 

 

Take for example the Cyclone III starter board from terasic. 

 

From my calculations, the power supplies can deliver up to 12W of power to the FPGA. However, if I use the calculations from AN358 (thermal dissipation), the EP3C35 chip should only be able to dissipate about 1.6W in still air. 

 

From the power play estimator, I can implement a Nios processor, DDR2 controller, etc, and see that the chip will require around 4W of power. 

 

In this case, the ep3c25 chip should overheat on the starter kit, unless the power dissipation estimates are incorrect. 

 

This is my frustration. The data sheet for the cyclone III devices do not provide maximum power dissipation, or means to estimate it, and thus makes if difficult to judge whether a heatsink will be required. 

 

Thank you again for your help. 

 

Dave Rector 

*:^)
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Altera_Forum
Honored Contributor II
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Considering a realistic temperature range, you can dissipate 3 to 4 W in the Cyclone III. I see, that a full featured application can slightly exceed this budget. In this case a heatsink and/or a fan would be meaningful.

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Altera_Forum
Honored Contributor II
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Thank you again for your help and quick reply. 

 

Please, how did you come up with the 3-4W dissipation number. This has been what is frustrating me. I cannot seem to find information on how to determine the maximum dissipation. 

 

Also, if your estimation is correct, then it seems easily possible to exceed the maximum dissipation on the Cyclone III starter board from terasic, which does not supply, suggest or warn about using a heat sink. 

 

Dave Rector 

*:^)
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Altera_Forum
Honored Contributor II
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I simply put in a reasonable temperature range. Generally, a Dev.Kit isn't a professionel instrument. It must not be expected to be operated at extreme temperatures, most likely it isn't even operated continuously. On the other hand, the FPGA chip won't be immediately damaged when the specified max. junction temperature is exceeded. 

 

Yes, I think you are able to overheat the Dev. Kit by running a design with high power consumption. I don't think, that an explicite warning is required. I didn't yet hear of a Dev. Kit that has been damaged this way, but it's possible at least.
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Altera_Forum
Honored Contributor II
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Thanks again for your help. 

 

However, when I put the numbers in, I get about 1.5 to 1.6W rather than 3-4W. 

 

e.g.: (80 (degrees max junction temp)-50 (max ambient temp))/20 (thermal resistance from dspkg.pdf) = 1.5W 

 

I get about the same result if I use 125 degree max junction temp and 80 degrees max ambient temp 

 

Is there something that I am doing wrong? What values were you using? 

 

Dave Rector 

*:^)
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Altera_Forum
Honored Contributor II
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Seems to be rather hot in your rooms?

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Altera_Forum
Honored Contributor II
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Hello, 

 

I used 50 degrees C for the ambient temperature because that is the maximum temperature that I can observe inside a box that has been running for a few hours. Remember I am rating this thing for still air. 

 

However, even if I use 30 degrees C, I still get (80-30)/20 = 2.5W which is still below the 3-4W that you estimate. 

 

Please help me understand what numbers you used in your calculations, then I could get a better idea about how to estimate the maximum power dissipation for these devices. 

 

Dave Rector 

*:^)
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Altera_Forum
Honored Contributor II
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Unlike a regular instrument, a Dev. Kit isn not placed in a box. I also don't understand why you arbitrarily put in 80°C junction temperature for your calculation?. As said, I simply assumed a reasonable ambient temperature (of 35°C) and 125°C maximum junction temperature. As also said, the caculation doesn't apply for a professional instrument design, but it's O.K. for the operation conditions of a Dev. Kit. in my opinion.

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