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Problem when onchip memory is selected as the exception vector location for cpu

Altera_Forum
Honored Contributor II
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Hi, 

I have made a project with Nios2 cpu where I set the reset vector to point to flash and the exception vector to point to a small onchip ram. 

The system library is configured to have code and data in external SRAM. 

 

When I load the code to flash and reboot the board nothing works... 

 

When I try to debug the software I see the debugger loading code into the SRAM and a small portion of code into my onchip ram area (which is expected) but when I step through the code somewhere around call to the main function the debugger fails. 

 

The code I am trying is a working code, recompiled with a new system library for the new quartus project with only one thing changed: exception vector was moved from external SRAM to onchip ram. 

 

Are there any steps required to make in order to allow code to run in such configuration? 

 

The onchip memory tests OK with 1 wait state, debugger loading and veryfying code, but things do not work... including debugger itself failing. 

 

Anybody with experience of moving exception vector to onchip memory would like to help me? 

 

Thanks!
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Altera_Forum
Honored Contributor II
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:-) Silly me :-) 

Inside the main() I left the code to test this onchip memory and I was effectively overwriting whatever debugger wrote there before... 

Code works now, sorry for taking your time.
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